Summary for Variable entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for entropy_edn_mode_enabled
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
342822 |
1 |
|
|
T1 |
332 |
|
T2 |
18 |
|
T3 |
4530 |
auto[1] |
326744 |
1 |
|
|
T9 |
76 |
|
T11 |
108 |
|
T51 |
16 |
Summary for Variable prescaler_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for prescaler_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
167931 |
1 |
|
|
T1 |
67 |
|
T2 |
8 |
|
T3 |
1102 |
lower_val |
165597 |
1 |
|
|
T1 |
84 |
|
T2 |
4 |
|
T3 |
1138 |
zero_val |
1866 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
7 |
Summary for Variable wait_timer_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for wait_timer_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
253400 |
1 |
|
|
T1 |
176 |
|
T2 |
6 |
|
T3 |
2326 |
lower_val |
252160 |
1 |
|
|
T1 |
156 |
|
T2 |
12 |
|
T3 |
2204 |
zero_val |
164006 |
1 |
|
|
T9 |
34 |
|
T11 |
56 |
|
T51 |
12 |
Summary for Cross entropy_timer_cross
Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
18 |
0 |
18 |
100.00 |
|
Automatically Generated Cross Bins for entropy_timer_cross
Bins
prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
higher_val |
auto[0] |
43096 |
1 |
|
|
T1 |
38 |
|
T2 |
2 |
|
T3 |
580 |
higher_val |
higher_val |
auto[1] |
20441 |
1 |
|
|
T9 |
6 |
|
T11 |
4 |
|
T55 |
10 |
higher_val |
lower_val |
auto[0] |
42875 |
1 |
|
|
T1 |
29 |
|
T2 |
6 |
|
T3 |
522 |
higher_val |
lower_val |
auto[1] |
20332 |
1 |
|
|
T9 |
4 |
|
T11 |
7 |
|
T51 |
1 |
higher_val |
zero_val |
auto[0] |
86 |
1 |
|
|
T11 |
1 |
|
T51 |
1 |
|
T12 |
1 |
higher_val |
zero_val |
auto[1] |
41101 |
1 |
|
|
T9 |
8 |
|
T11 |
16 |
|
T51 |
2 |
lower_val |
higher_val |
auto[0] |
42241 |
1 |
|
|
T1 |
46 |
|
T2 |
2 |
|
T3 |
576 |
lower_val |
higher_val |
auto[1] |
20482 |
1 |
|
|
T9 |
8 |
|
T11 |
4 |
|
T62 |
1 |
lower_val |
lower_val |
auto[0] |
41896 |
1 |
|
|
T1 |
38 |
|
T2 |
2 |
|
T3 |
562 |
lower_val |
lower_val |
auto[1] |
20383 |
1 |
|
|
T9 |
5 |
|
T11 |
7 |
|
T62 |
1 |
lower_val |
zero_val |
auto[0] |
78 |
1 |
|
|
T18 |
1 |
|
T53 |
3 |
|
T109 |
1 |
lower_val |
zero_val |
auto[1] |
40517 |
1 |
|
|
T9 |
5 |
|
T11 |
11 |
|
T55 |
16 |
zero_val |
higher_val |
auto[0] |
600 |
1 |
|
|
T1 |
1 |
|
T3 |
2 |
|
T7 |
1 |
zero_val |
higher_val |
auto[1] |
129 |
1 |
|
|
T16 |
2 |
|
T106 |
1 |
|
T108 |
2 |
zero_val |
lower_val |
auto[0] |
516 |
1 |
|
|
T2 |
1 |
|
T3 |
5 |
|
T8 |
3 |
zero_val |
lower_val |
auto[1] |
138 |
1 |
|
|
T11 |
1 |
|
T16 |
2 |
|
T18 |
1 |
zero_val |
zero_val |
auto[0] |
269 |
1 |
|
|
T11 |
1 |
|
T51 |
1 |
|
T62 |
1 |
zero_val |
zero_val |
auto[1] |
214 |
1 |
|
|
T106 |
1 |
|
T53 |
3 |
|
T108 |
4 |