Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10289	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8714	1			T1	17		T11	17		T7	23
len_5001_7500	13949	1			T1	17		T11	17		T7	70
len_2501_5000	8961	1			T1	17		T11	17		T7	10
len_1025_2500	5310	1			T1	10		T11	10		T7	10
len_769_1024	6152	1			T1	2		T2	8		T3	44
len_513_768	6453	1			T1	2		T2	14		T3	40
len_257_512	20845	1			T1	2		T2	5		T3	53
len_0_256	255795	1			T1	290		T2	12		T3	59
len_keccak_block_sizes[72]	721	1			T1	2		T11	2		T14	2
len_keccak_block_sizes[104]	612	1			T1	2		T11	2		T19	2
len_keccak_block_sizes[136]	515	1			T1	2		T11	2		T33	2
len_keccak_block_sizes[144]	421	1			T1	2		T11	2		T8	1
len_keccak_block_sizes[168]	326	1			T72	3		T48	1		T182	3
len_1	751	1			T1	2		T11	2		T14	2
len_0	1187	1			T1	2		T11	2		T7	3