Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	631	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5380	1			T2	3		T3	44		T7	19
len_601_800	11947	1			T2	10		T3	64		T7	44
len_401_600	7934	1			T2	5		T3	36		T7	36
len_201_400	16021	1			T2	4		T3	27		T7	11
len_65_200	73540	1			T3	15		T7	11		T8	3
len_min_for_xof_require_squeeze	990	1			T72	9		T58	1		T182	10
len_keccak_block_sizes[72]	748	1			T72	9		T182	5		T183	5
len_keccak_block_sizes[104]	735	1			T72	9		T182	5		T137	1
len_keccak_block_sizes[136]	749	1			T72	9		T182	5		T183	5
len_keccak_block_sizes[144]	279	1			T182	5		T183	5		T184	5
len_keccak_block_sizes[168]	290	1			T3	1		T7	1		T55	1
len_datapath_width	13439	1			T3	1		T7	2		T14	246
len_2_63	213071	1			T1	390		T2	2		T3	7
len_1	59	1			T185	2		T186	1		T146	1