Group : kmac_env_pkg::kmac_env_cov::state_read_mask_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : kmac_env_pkg::kmac_env_cov::state_read_mask_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::state_read_mask_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 6 0 6 100.00
Crosses 8 0 8 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::state_read_mask_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
share 2 0 2 100.00 100 1 1 2
state_read_mask 4 0 4 100.00 100 1 1 0


Crosses for Group kmac_env_pkg::kmac_env_cov::state_read_mask_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
state_mask_share_cross 8 0 8 100.00 100 1 1 0


Summary for Variable share

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for share

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 10483693 1 T1 2730 T2 6917 T3 32671
auto[1] 10483674 1 T1 2730 T2 6917 T3 32671



Summary for Variable state_read_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 4 0 4 100.00


User Defined Bins for state_read_mask

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
word_access 20731731 1 T1 5460 T2 13772 T3 65046
triple_byte_access 78476 1 T2 18 T3 76 T7 74
halfword_access 78920 1 T2 22 T3 102 T7 68
byte_access 78240 1 T2 22 T3 118 T7 40



Summary for Cross state_mask_share_cross

Samples crossed: share state_read_mask
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 8 0 8 100.00


Automatically Generated Cross Bins for state_mask_share_cross

Bins
sharestate_read_maskCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] word_access 10365875 1 T1 2730 T2 6886 T3 32523
auto[0] triple_byte_access 39238 1 T2 9 T3 38 T7 37
auto[0] halfword_access 39460 1 T2 11 T3 51 T7 34
auto[0] byte_access 39120 1 T2 11 T3 59 T7 20
auto[1] word_access 10365856 1 T1 2730 T2 6886 T3 32523
auto[1] triple_byte_access 39238 1 T2 9 T3 38 T7 37
auto[1] halfword_access 39460 1 T2 11 T3 51 T7 34
auto[1] byte_access 39120 1 T2 11 T3 59 T7 20

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%