Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10279	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9223	1			T3	38		T8	30		T9	9
len_5001_7500	15226	1			T1	33		T3	36		T8	105
len_2501_5000	9367	1			T1	34		T3	36		T8	24
len_1025_2500	5456	1			T1	20		T3	22		T8	9
len_769_1024	6061	1			T1	4		T3	4		T13	39
len_513_768	6412	1			T1	3		T3	4		T13	41
len_257_512	20931	1			T1	4		T3	52		T13	34
len_0_256	257323	1			T1	148		T3	2017		T7	9
len_keccak_block_sizes[72]	713	1			T1	2		T3	3		T85	2
len_keccak_block_sizes[104]	611	1			T3	3		T85	2		T89	2
len_keccak_block_sizes[136]	513	1			T3	3		T85	2		T89	2
len_keccak_block_sizes[144]	421	1			T3	3		T8	1		T85	2
len_keccak_block_sizes[168]	321	1			T3	3		T90	3		T66	1
len_1	748	1			T1	2		T3	3		T85	2
len_0	1216	1			T1	2		T3	3		T8	3