Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	723	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5967	1			T7	9		T8	6		T35	14
len_601_800	13451	1			T7	25		T8	25		T35	34
len_401_600	8954	1			T7	20		T8	16		T35	28
len_201_400	16319	1			T7	10		T8	6		T35	15
len_65_200	73283	1			T13	82		T7	1		T8	1
len_min_for_xof_require_squeeze	1002	1			T13	1		T22	9		T75	9
len_keccak_block_sizes[72]	748	1			T22	9		T75	9		T95	3
len_keccak_block_sizes[104]	756	1			T13	1		T22	9		T75	9
len_keccak_block_sizes[136]	750	1			T13	1		T22	9		T75	9
len_keccak_block_sizes[144]	285	1			T95	1		T154	2		T204	1
len_keccak_block_sizes[168]	279	1			T96	1		T121	1		T205	5
len_datapath_width	14290	1			T1	246		T3	246		T12	246
len_2_63	212664	1			T2	390		T11	390		T13	64
len_1	61	1			T13	2		T95	3		T96	1