Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10258	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8973	1			T7	4		T13	30		T8	28
len_5001_7500	14548	1			T7	14		T13	30		T8	90
len_2501_5000	9153	1			T7	3		T13	30		T8	16
len_1025_2500	5334	1			T7	3		T13	16		T8	13
len_769_1024	6149	1			T1	39		T2	21		T13	4
len_513_768	6530	1			T1	46		T2	27		T13	2
len_257_512	21095	1			T1	55		T2	28		T13	244
len_0_256	256604	1			T1	34		T2	21		T3	171
len_keccak_block_sizes[72]	722	1			T13	3		T35	3		T65	2
len_keccak_block_sizes[104]	617	1			T1	1		T13	3		T35	3
len_keccak_block_sizes[136]	514	1			T13	3		T35	3		T65	2
len_keccak_block_sizes[144]	419	1			T13	3		T35	3		T191	3
len_keccak_block_sizes[168]	323	1			T13	3		T35	3		T191	3
len_1	736	1			T11	3		T13	3		T8	1
len_0	1203	1			T3	3		T11	3		T7	3