Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	665	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5356	1			T1	24		T2	14		T7	1
len_601_800	12596	1			T1	57		T2	35		T7	11
len_401_600	8340	1			T1	33		T2	24		T7	6
len_201_400	16485	1			T1	15		T2	6		T7	6
len_65_200	73823	1			T1	6		T2	1		T3	75
len_min_for_xof_require_squeeze	1004	1			T1	1		T13	9		T35	9
len_keccak_block_sizes[72]	751	1			T3	1		T13	9		T8	2
len_keccak_block_sizes[104]	763	1			T13	9		T8	2		T35	9
len_keccak_block_sizes[136]	752	1			T3	1		T13	9		T35	9
len_keccak_block_sizes[144]	290	1			T8	2		T192	5		T193	1
len_keccak_block_sizes[168]	282	1			T192	5		T139	1		T56	1
len_datapath_width	13907	1			T1	1		T3	2		T11	5
len_2_63	212601	1			T1	11		T2	9		T3	93
len_1	51	1			T1	1		T3	1		T11	1