Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10298	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9046	1			T1	30		T4	19		T5	24
len_5001_7500	14544	1			T1	30		T4	67		T5	24
len_2501_5000	9221	1			T1	30		T4	11		T5	24
len_1025_2500	5441	1			T1	16		T4	7		T5	14
len_769_1024	6297	1			T1	4		T5	2		T13	4
len_513_768	6689	1			T1	2		T4	1		T5	3
len_257_512	21280	1			T1	244		T5	2		T13	244
len_0_256	257593	1			T1	1897		T4	17		T5	211
len_keccak_block_sizes[72]	717	1			T1	3		T5	2		T13	3
len_keccak_block_sizes[104]	616	1			T1	3		T5	2		T13	3
len_keccak_block_sizes[136]	517	1			T1	3		T13	3		T14	2
len_keccak_block_sizes[144]	422	1			T1	3		T13	3		T14	2
len_keccak_block_sizes[168]	317	1			T1	3		T13	3		T8	1
len_1	740	1			T1	3		T5	2		T13	3
len_0	1189	1			T1	3		T4	1		T5	2