Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	661	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5662	1			T4	20		T7	36		T8	58
len_601_800	12769	1			T4	39		T7	74		T8	126
len_401_600	8396	1			T4	29		T7	58		T8	86
len_201_400	16614	1			T4	14		T7	30		T8	39
len_65_200	74092	1			T1	685		T4	14		T13	685
len_min_for_xof_require_squeeze	1007	1			T1	9		T4	1		T13	9
len_keccak_block_sizes[72]	758	1			T1	9		T13	9		T33	5
len_keccak_block_sizes[104]	765	1			T1	9		T13	9		T8	1
len_keccak_block_sizes[136]	753	1			T1	9		T13	9		T33	5
len_keccak_block_sizes[144]	269	1			T33	5		T10	1		T98	1
len_keccak_block_sizes[168]	302	1			T33	5		T36	1		T9	1
len_datapath_width	14098	1			T1	9		T4	1		T13	9
len_2_63	213374	1			T1	1643		T4	5		T5	310
len_1	60	1			T80	1		T40	1		T175	4