Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10344	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9414	1			T12	17		T13	17		T14	17
len_5001_7500	15318	1			T12	17		T13	17		T14	17
len_2501_5000	9475	1			T12	17		T13	17		T14	17
len_1025_2500	5526	1			T12	10		T13	10		T14	10
len_769_1024	6626	1			T2	5		T12	2		T13	2
len_513_768	7061	1			T2	1		T12	2		T13	2
len_257_512	21485	1			T2	6		T12	2		T13	2
len_0_256	257657	1			T1	26		T2	5		T12	290
len_keccak_block_sizes[72]	719	1			T2	1		T12	2		T13	2
len_keccak_block_sizes[104]	626	1			T12	2		T13	2		T14	2
len_keccak_block_sizes[136]	523	1			T12	2		T13	2		T14	2
len_keccak_block_sizes[144]	416	1			T12	2		T13	2		T14	2
len_keccak_block_sizes[168]	322	1			T35	3		T93	3		T91	3
len_1	750	1			T12	2		T13	2		T14	2
len_0	1223	1			T1	2		T12	2		T13	2