Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	749	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	6136	1			T2	4		T7	6		T8	24
len_601_800	13635	1			T2	5		T7	16		T8	56
len_401_600	9237	1			T2	5		T7	13		T8	39
len_201_400	16793	1			T2	2		T7	5		T8	23
len_65_200	73650	1			T1	12		T2	1		T7	1
len_min_for_xof_require_squeeze	1008	1			T35	9		T9	1		T52	1
len_keccak_block_sizes[72]	750	1			T35	9		T9	2		T93	9
len_keccak_block_sizes[104]	755	1			T35	9		T9	2		T93	9
len_keccak_block_sizes[136]	744	1			T1	1		T35	9		T9	1
len_keccak_block_sizes[144]	281	1			T1	1		T2	1		T9	1
len_keccak_block_sizes[168]	285	1			T91	5		T179	5		T180	5
len_datapath_width	14176	1			T1	1		T6	3		T35	9
len_2_63	214213	1			T1	13		T2	8		T12	390
len_1	61	1			T181	1		T88	1		T48	2