Summary for Variable entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
Automatically Generated Bins |
2 |
0 |
2 |
100.00 |
Automatically Generated Bins for entropy_edn_mode_enabled
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
auto[0] |
349132 |
1 |
|
|
T1 |
56 |
|
T2 |
2 |
|
T3 |
130 |
auto[1] |
348258 |
1 |
|
|
T2 |
618 |
|
T6 |
178 |
|
T18 |
62 |
Summary for Variable prescaler_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for prescaler_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
175284 |
1 |
|
|
T1 |
6 |
|
T2 |
200 |
|
T3 |
30 |
lower_val |
172193 |
1 |
|
|
T1 |
12 |
|
T2 |
161 |
|
T3 |
26 |
zero_val |
1867 |
1 |
|
|
T1 |
1 |
|
T2 |
1 |
|
T3 |
1 |
Summary for Variable wait_timer_val
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT |
User Defined Bins |
3 |
0 |
3 |
100.00 |
User Defined Bins for wait_timer_val
Bins
NAME | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
260912 |
1 |
|
|
T1 |
30 |
|
T2 |
178 |
|
T3 |
62 |
lower_val |
262092 |
1 |
|
|
T1 |
26 |
|
T2 |
152 |
|
T3 |
68 |
zero_val |
174386 |
1 |
|
|
T2 |
290 |
|
T6 |
108 |
|
T18 |
34 |
Summary for Cross entropy_timer_cross
Samples crossed: prescaler_val wait_timer_val entropy_edn_mode_enabled
CATEGORY | EXPECTED | UNCOVERED | COVERED | PERCENT | MISSING |
Automatically Generated Cross Bins |
18 |
0 |
18 |
100.00 |
|
Automatically Generated Cross Bins for entropy_timer_cross
Bins
prescaler_val | wait_timer_val | entropy_edn_mode_enabled | COUNT | AT LEAST | STATUS | | TEST | COUNT | | TEST | COUNT | | TEST | COUNT |
higher_val |
higher_val |
auto[0] |
43694 |
1 |
|
|
T1 |
3 |
|
T3 |
14 |
|
T4 |
1 |
higher_val |
higher_val |
auto[1] |
21772 |
1 |
|
|
T2 |
45 |
|
T6 |
10 |
|
T18 |
1 |
higher_val |
lower_val |
auto[0] |
43866 |
1 |
|
|
T1 |
3 |
|
T3 |
16 |
|
T5 |
5 |
higher_val |
lower_val |
auto[1] |
22083 |
1 |
|
|
T2 |
62 |
|
T6 |
10 |
|
T18 |
9 |
higher_val |
zero_val |
auto[0] |
86 |
1 |
|
|
T7 |
1 |
|
T54 |
1 |
|
T69 |
1 |
higher_val |
zero_val |
auto[1] |
43783 |
1 |
|
|
T2 |
93 |
|
T6 |
27 |
|
T18 |
10 |
lower_val |
higher_val |
auto[0] |
42618 |
1 |
|
|
T1 |
4 |
|
T3 |
12 |
|
T5 |
9 |
lower_val |
higher_val |
auto[1] |
21325 |
1 |
|
|
T2 |
48 |
|
T6 |
10 |
|
T18 |
1 |
lower_val |
lower_val |
auto[0] |
43098 |
1 |
|
|
T1 |
8 |
|
T3 |
14 |
|
T5 |
7 |
lower_val |
lower_val |
auto[1] |
21766 |
1 |
|
|
T2 |
35 |
|
T6 |
8 |
|
T18 |
3 |
lower_val |
zero_val |
auto[0] |
98 |
1 |
|
|
T2 |
1 |
|
T6 |
1 |
|
T69 |
1 |
lower_val |
zero_val |
auto[1] |
43288 |
1 |
|
|
T2 |
77 |
|
T6 |
19 |
|
T18 |
8 |
zero_val |
higher_val |
auto[0] |
569 |
1 |
|
|
T1 |
1 |
|
T3 |
1 |
|
T4 |
1 |
zero_val |
higher_val |
auto[1] |
139 |
1 |
|
|
T6 |
1 |
|
T19 |
1 |
|
T180 |
1 |
zero_val |
lower_val |
auto[0] |
524 |
1 |
|
|
T5 |
1 |
|
T9 |
6 |
|
T17 |
1 |
zero_val |
lower_val |
auto[1] |
138 |
1 |
|
|
T6 |
2 |
|
T7 |
2 |
|
T43 |
1 |
zero_val |
zero_val |
auto[0] |
278 |
1 |
|
|
T2 |
1 |
|
T6 |
2 |
|
T18 |
1 |
zero_val |
zero_val |
auto[1] |
219 |
1 |
|
|
T6 |
3 |
|
T7 |
1 |
|
T43 |
3 |