Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10326	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9303	1			T2	24		T9	30		T6	12
len_5001_7500	15392	1			T2	24		T9	30		T6	49
len_2501_5000	9365	1			T2	24		T9	30		T6	10
len_1025_2500	5515	1			T2	14		T9	16		T6	7
len_769_1024	5906	1			T1	7		T2	2		T3	12
len_513_768	6438	1			T1	4		T2	3		T3	12
len_257_512	20818	1			T1	3		T2	2		T3	23
len_0_256	258716	1			T1	1		T2	211		T3	13
len_keccak_block_sizes[72]	726	1			T2	2		T9	3		T17	3
len_keccak_block_sizes[104]	614	1			T2	2		T9	3		T17	3
len_keccak_block_sizes[136]	520	1			T9	3		T6	1		T17	3
len_keccak_block_sizes[144]	414	1			T9	3		T17	3		T75	3
len_keccak_block_sizes[168]	321	1			T9	3		T17	3		T75	3
len_1	776	1			T2	2		T9	3		T17	3
len_0	1255	1			T2	2		T9	3		T6	4