Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10183	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9010	1			T6	19		T14	17		T55	37
len_5001_7500	14641	1			T6	18		T13	33		T14	17
len_2501_5000	9198	1			T6	18		T13	34		T14	17
len_1025_2500	5424	1			T6	11		T13	20		T14	10
len_769_1024	6380	1			T3	36		T12	39		T6	2
len_513_768	6644	1			T3	32		T12	31		T6	2
len_257_512	20827	1			T3	37		T12	26		T6	2
len_0_256	254455	1			T3	47		T4	9		T5	9
len_keccak_block_sizes[72]	714	1			T6	2		T13	2		T14	2
len_keccak_block_sizes[104]	613	1			T6	2		T14	2		T152	2
len_keccak_block_sizes[136]	511	1			T12	1		T6	2		T14	2
len_keccak_block_sizes[144]	420	1			T3	1		T7	1		T14	2
len_keccak_block_sizes[168]	329	1			T66	3		T180	3		T32	2
len_1	746	1			T6	2		T13	2		T14	2
len_0	1243	1			T6	2		T13	2		T14	2