Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10202	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9035	1			T3	34		T11	19		T6	19
len_5001_7500	14460	1			T3	76		T11	18		T6	18
len_2501_5000	9179	1			T3	17		T11	18		T6	18
len_1025_2500	5409	1			T3	15		T11	11		T6	11
len_769_1024	5960	1			T2	25		T3	4		T4	28
len_513_768	6292	1			T2	33		T3	4		T4	30
len_257_512	20763	1			T2	25		T3	2		T4	30
len_0_256	255174	1			T2	33		T3	25		T4	27
len_keccak_block_sizes[72]	721	1			T11	2		T6	2		T7	1
len_keccak_block_sizes[104]	612	1			T11	2		T6	2		T39	2
len_keccak_block_sizes[136]	519	1			T11	2		T6	2		T39	2
len_keccak_block_sizes[144]	415	1			T31	3		T32	3		T36	3
len_keccak_block_sizes[168]	312	1			T2	1		T31	3		T32	3
len_1	746	1			T4	1		T11	2		T6	2
len_0	1259	1			T3	3		T11	2		T6	2