Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	629	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5483	1			T2	23		T3	29		T4	14
len_601_800	12312	1			T2	53		T3	66		T4	45
len_401_600	8168	1			T2	18		T3	46		T4	22
len_201_400	16386	1			T2	13		T3	16		T4	4
len_65_200	73207	1			T2	5		T3	10		T4	5
len_min_for_xof_require_squeeze	995	1			T12	1		T31	9		T32	10
len_keccak_block_sizes[72]	746	1			T14	1		T31	9		T32	5
len_keccak_block_sizes[104]	736	1			T14	1		T31	9		T32	5
len_keccak_block_sizes[136]	741	1			T31	9		T32	5		T36	5
len_keccak_block_sizes[144]	298	1			T32	5		T36	5		T16	1
len_keccak_block_sizes[168]	286	1			T14	1		T32	5		T36	5
len_datapath_width	13970	1			T2	1		T3	1		T12	6
len_2_63	211511	1			T2	86		T3	7		T4	11
len_1	56	1			T126	1		T178	1		T179	2