Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10119	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9049	1			T2	30		T5	10		T10	38
len_5001_7500	14682	1			T2	30		T4	33		T5	10
len_2501_5000	9180	1			T2	30		T4	34		T5	1
len_1025_2500	5430	1			T2	16		T4	20		T5	1
len_769_1024	6056	1			T1	29		T2	4		T4	4
len_513_768	6400	1			T1	23		T2	2		T4	3
len_257_512	20735	1			T1	29		T2	244		T4	4
len_0_256	253695	1			T1	29		T2	1897		T4	148
len_keccak_block_sizes[72]	709	1			T2	3		T4	2		T10	3
len_keccak_block_sizes[104]	606	1			T2	3		T5	1		T10	3
len_keccak_block_sizes[136]	511	1			T2	3		T10	3		T13	2
len_keccak_block_sizes[144]	415	1			T1	1		T2	3		T5	1
len_keccak_block_sizes[168]	317	1			T2	3		T10	3		T193	3
len_1	751	1			T2	3		T4	2		T5	1
len_0	1220	1			T2	3		T4	2		T5	2