Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	673	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5892	1			T1	21		T3	18		T6	14
len_601_800	13427	1			T1	60		T3	55		T6	61
len_401_600	8967	1			T1	32		T3	31		T6	40
len_201_400	16314	1			T1	12		T3	8		T4	251
len_65_200	72103	1			T1	8		T3	6		T4	680
len_min_for_xof_require_squeeze	971	1			T4	10		T11	1		T19	9
len_keccak_block_sizes[72]	728	1			T4	5		T6	1		T19	9
len_keccak_block_sizes[104]	727	1			T4	5		T19	9		T197	5
len_keccak_block_sizes[136]	739	1			T4	5		T11	1		T19	9
len_keccak_block_sizes[144]	278	1			T4	5		T197	5		T55	5
len_keccak_block_sizes[168]	275	1			T4	5		T197	5		T55	5
len_datapath_width	14223	1			T4	5		T5	2		T6	1
len_2_63	210525	1			T1	9		T3	4		T4	1329
len_1	52	1			T5	1		T36	1		T198	1