Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	675	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5350	1			T3	31		T4	16		T5	1
len_601_800	12166	1			T3	69		T4	48		T5	3
len_401_600	7936	1			T3	47		T4	40		T5	3
len_201_400	16296	1			T3	21		T4	10		T5	2
len_65_200	74186	1			T2	685		T3	15		T4	3
len_min_for_xof_require_squeeze	1002	1			T2	9		T9	1		T131	1
len_keccak_block_sizes[72]	769	1			T2	9		T90	1		T181	5
len_keccak_block_sizes[104]	763	1			T2	9		T39	1		T131	2
len_keccak_block_sizes[136]	770	1			T2	9		T131	1		T183	1
len_keccak_block_sizes[144]	289	1			T131	2		T181	5		T182	5
len_keccak_block_sizes[168]	286	1			T181	5		T182	5		T184	1
len_datapath_width	14245	1			T1	3		T2	9		T3	1
len_2_63	214652	1			T1	6		T2	1643		T3	10
len_1	63	1			T131	2		T90	1		T185	2