Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10322	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9020	1			T1	17		T10	19		T12	19
len_5001_7500	14276	1			T1	17		T10	18		T12	18
len_2501_5000	9198	1			T1	17		T10	18		T12	18
len_1025_2500	5366	1			T1	10		T10	11		T12	11
len_769_1024	6067	1			T1	2		T10	2		T6	1
len_513_768	6453	1			T1	2		T10	2		T12	2
len_257_512	21058	1			T1	2		T10	2		T6	1
len_0_256	257478	1			T1	290		T2	176		T3	9
len_keccak_block_sizes[72]	719	1			T1	2		T10	2		T6	1
len_keccak_block_sizes[104]	623	1			T1	2		T10	2		T12	2
len_keccak_block_sizes[136]	515	1			T1	2		T10	2		T12	2
len_keccak_block_sizes[144]	428	1			T1	2		T43	1		T47	3
len_keccak_block_sizes[168]	323	1			T43	1		T23	2		T14	1
len_1	734	1			T1	2		T10	2		T11	1
len_0	1159	1			T1	2		T2	7		T10	2