Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	619	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5398	1			T43	20		T7	12		T23	13
len_601_800	12291	1			T6	2		T43	44		T7	23
len_401_600	8073	1			T43	24		T7	20		T23	20
len_201_400	16490	1			T43	17		T7	8		T23	8
len_65_200	73912	1			T2	84		T6	1		T11	15
len_min_for_xof_require_squeeze	998	1			T35	1		T47	9		T147	9
len_keccak_block_sizes[72]	748	1			T2	1		T35	2		T47	9
len_keccak_block_sizes[104]	771	1			T2	1		T11	1		T47	9
len_keccak_block_sizes[136]	751	1			T2	2		T47	9		T72	2
len_keccak_block_sizes[144]	285	1			T32	1		T138	1		T149	1
len_keccak_block_sizes[168]	299	1			T138	1		T150	1		T170	1
len_datapath_width	13893	1			T2	12		T3	3		T5	3
len_2_63	213802	1			T1	390		T2	77		T3	6
len_1	55	1			T2	3		T35	2		T138	2