Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10154	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8909	1			T1	30		T3	19		T12	19
len_5001_7500	14319	1			T1	30		T3	18		T12	18
len_2501_5000	9172	1			T1	30		T3	18		T12	18
len_1025_2500	5342	1			T1	16		T3	11		T12	11
len_769_1024	6164	1			T1	4		T3	2		T12	2
len_513_768	6610	1			T1	2		T3	2		T12	2
len_257_512	20495	1			T1	244		T3	2		T12	2
len_0_256	254625	1			T1	1897		T2	9		T3	274
len_keccak_block_sizes[72]	713	1			T1	3		T3	2		T12	2
len_keccak_block_sizes[104]	618	1			T1	3		T3	2		T12	2
len_keccak_block_sizes[136]	521	1			T1	3		T3	2		T12	2
len_keccak_block_sizes[144]	418	1			T1	3		T5	2		T36	3
len_keccak_block_sizes[168]	313	1			T1	3		T36	3		T50	1
len_1	758	1			T1	3		T3	2		T12	2
len_0	1214	1			T1	3		T3	2		T12	2