Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	668	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5360	1			T4	19		T7	15		T21	23
len_601_800	12353	1			T4	45		T7	33		T21	76
len_401_600	8252	1			T4	27		T7	17		T21	44
len_201_400	16433	1			T4	17		T7	12		T21	22
len_65_200	72914	1			T1	685		T4	2		T7	6
len_min_for_xof_require_squeeze	996	1			T1	9		T36	9		T184	10
len_keccak_block_sizes[72]	766	1			T1	9		T36	9		T184	5
len_keccak_block_sizes[104]	741	1			T1	9		T36	9		T184	5
len_keccak_block_sizes[136]	756	1			T1	9		T36	9		T184	5
len_keccak_block_sizes[144]	287	1			T184	5		T64	1		T185	1
len_keccak_block_sizes[168]	285	1			T184	5		T39	1		T186	5
len_datapath_width	14197	1			T1	9		T2	3		T13	246
len_2_63	210960	1			T1	1643		T2	6		T3	374
len_1	59	1			T62	1		T187	1		T188	1