Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	659	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5659	1			T12	14		T13	16		T6	10
len_601_800	12688	1			T12	33		T13	36		T6	16
len_401_600	8417	1			T12	27		T13	25		T6	13
len_201_400	16698	1			T12	9		T13	9		T6	8
len_65_200	74258	1			T5	58		T12	7		T13	5
len_min_for_xof_require_squeeze	1010	1			T5	1		T13	1		T8	1
len_keccak_block_sizes[72]	766	1			T5	1		T7	1		T18	1
len_keccak_block_sizes[104]	762	1			T7	1		T8	1		T19	5
len_keccak_block_sizes[136]	751	1			T8	1		T19	5		T194	9
len_keccak_block_sizes[144]	274	1			T19	5		T29	1		T195	5
len_keccak_block_sizes[168]	296	1			T7	1		T19	5		T53	1
len_datapath_width	13990	1			T4	3		T5	2		T7	12
len_2_63	213779	1			T3	310		T4	6		T5	53
len_1	63	1			T8	1		T9	1		T150	1