Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	642	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5277	1			T1	27		T2	5		T6	11
len_601_800	12266	1			T1	50		T2	2		T6	18
len_401_600	8131	1			T1	35		T2	5		T6	13
len_201_400	16456	1			T1	12		T2	2		T6	6
len_65_200	73433	1			T1	10		T6	9		T8	1
len_min_for_xof_require_squeeze	1013	1			T186	9		T137	1		T189	10
len_keccak_block_sizes[72]	751	1			T186	9		T137	2		T189	5
len_keccak_block_sizes[104]	749	1			T8	1		T186	9		T189	5
len_keccak_block_sizes[136]	758	1			T186	9		T137	2		T189	5
len_keccak_block_sizes[144]	282	1			T137	1		T189	5		T112	5
len_keccak_block_sizes[168]	276	1			T17	1		T18	1		T137	1
len_datapath_width	14131	1			T6	6		T10	3		T7	3
len_2_63	214147	1			T1	6		T2	12		T3	310
len_1	43	1			T137	1		T98	1		T76	1