Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10339	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9197	1			T1	38		T4	2		T15	38
len_5001_7500	14878	1			T1	36		T4	4		T15	36
len_2501_5000	9218	1			T1	36		T15	36		T84	18
len_1025_2500	5447	1			T1	22		T4	1		T15	22
len_769_1024	6483	1			T1	4		T11	35		T4	20
len_513_768	6981	1			T1	4		T11	45		T4	24
len_257_512	21349	1			T1	52		T11	29		T4	25
len_0_256	257838	1			T1	2017		T2	121		T3	9
len_keccak_block_sizes[72]	716	1			T1	3		T15	3		T84	2
len_keccak_block_sizes[104]	610	1			T1	3		T15	3		T84	2
len_keccak_block_sizes[136]	516	1			T1	3		T15	3		T84	2
len_keccak_block_sizes[144]	421	1			T1	3		T4	1		T15	3
len_keccak_block_sizes[168]	323	1			T1	3		T5	1		T15	3
len_1	765	1			T1	3		T15	3		T84	2
len_0	1210	1			T1	3		T2	1		T4	3