Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10233	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8915	1			T29	4		T31	25		T8	14
len_5001_7500	14157	1			T29	17		T30	33		T31	45
len_2501_5000	9208	1			T29	3		T30	34		T31	9
len_1025_2500	5387	1			T29	2		T30	20		T31	8
len_769_1024	6007	1			T1	25		T30	4		T7	6
len_513_768	6408	1			T1	33		T30	3		T7	4
len_257_512	20600	1			T1	31		T30	4		T7	5
len_0_256	255826	1			T1	23		T2	9		T3	9
len_keccak_block_sizes[72]	714	1			T30	2		T47	2		T78	2
len_keccak_block_sizes[104]	617	1			T78	2		T37	2		T38	3
len_keccak_block_sizes[136]	522	1			T37	2		T38	3		T15	1
len_keccak_block_sizes[144]	412	1			T38	3		T130	2		T52	1
len_keccak_block_sizes[168]	318	1			T38	3		T181	3		T182	1
len_1	762	1			T30	2		T8	1		T47	2
len_0	1183	1			T29	2		T30	2		T31	3