Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	681	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5390	1			T1	24		T29	2		T7	3
len_601_800	11918	1			T1	43		T29	8		T7	8
len_401_600	8079	1			T1	25		T29	12		T7	4
len_201_400	16339	1			T1	13		T29	6		T7	1
len_65_200	73288	1			T1	3		T29	1		T31	6
len_min_for_xof_require_squeeze	991	1			T38	10		T181	9		T183	10
len_keccak_block_sizes[72]	755	1			T8	1		T38	5		T20	2
len_keccak_block_sizes[104]	736	1			T38	5		T20	1		T181	9
len_keccak_block_sizes[136]	737	1			T38	5		T96	1		T16	2
len_keccak_block_sizes[144]	284	1			T38	5		T183	5		T184	5
len_keccak_block_sizes[168]	282	1			T38	5		T182	1		T183	5
len_datapath_width	13921	1			T2	3		T3	3		T30	246
len_2_63	212645	1			T1	67		T2	6		T3	6
len_1	57	1			T185	1		T49	1		T109	1