Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 10270 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 9005 1 T35 30 T36 10 T38 38
len_5001_7500 14522 1 T35 30 T36 30 T38 36
len_2501_5000 9250 1 T35 30 T36 7 T38 36
len_1025_2500 5411 1 T35 16 T36 2 T38 22
len_769_1024 6063 1 T2 13 T7 2 T21 46
len_513_768 6442 1 T1 1 T2 13 T21 52
len_257_512 20637 1 T2 20 T7 2 T21 48
len_0_256 255246 1 T2 23 T7 1 T21 44
len_keccak_block_sizes[72] 715 1 T35 3 T38 3 T93 2
len_keccak_block_sizes[104] 618 1 T21 1 T35 3 T38 3
len_keccak_block_sizes[136] 518 1 T2 1 T35 3 T38 3
len_keccak_block_sizes[144] 424 1 T35 3 T38 3 T93 2
len_keccak_block_sizes[168] 311 1 T35 3 T38 3 T41 3
len_1 733 1 T35 3 T38 3 T93 2
len_0 1197 1 T2 1 T35 3 T36 1

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