Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	653	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5494	1			T2	11		T21	26		T22	1
len_601_800	12198	1			T1	1		T2	26		T7	2
len_401_600	8075	1			T2	11		T7	2		T21	51
len_201_400	16455	1			T2	11		T7	1		T21	25
len_65_200	72884	1			T2	7		T21	13		T22	1
len_min_for_xof_require_squeeze	994	1			T35	9		T37	1		T8	1
len_keccak_block_sizes[72]	748	1			T2	1		T35	9		T38	5
len_keccak_block_sizes[104]	751	1			T35	9		T37	1		T38	5
len_keccak_block_sizes[136]	740	1			T35	9		T37	1		T38	5
len_keccak_block_sizes[144]	283	1			T37	2		T38	5		T41	5
len_keccak_block_sizes[168]	292	1			T38	5		T41	5		T63	5
len_datapath_width	14076	1			T34	3		T35	9		T37	7
len_2_63	212062	1			T2	3		T7	3		T21	13
len_1	48	1			T21	1		T37	2		T199	1