Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
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Group : kmac_env_pkg::kmac_env_cov::msg_len_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv



Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 0 15 100.00


Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
msg_len 15 0 15 100.00 100 1 1 0


Summary for Variable msg_len

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 15 0 15 100.00


User Defined Bins for msg_len

Excluded/Illegal bins
NAMECOUNTSTATUS
remainder 10296 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
len_7501_10000 9092 1 T1 41 T2 23 T30 38
len_5001_7500 14595 1 T1 97 T2 50 T30 36
len_2501_5000 9208 1 T1 20 T2 14 T30 36
len_1025_2500 5402 1 T1 10 T2 8 T30 22
len_769_1024 6191 1 T2 26 T30 4 T6 1
len_513_768 6837 1 T2 22 T30 4 T7 26
len_257_512 21273 1 T1 1 T2 28 T30 52
len_0_256 257696 1 T1 31 T2 78 T15 9
len_keccak_block_sizes[72] 714 1 T30 3 T32 3 T195 3
len_keccak_block_sizes[104] 619 1 T30 3 T32 3 T195 3
len_keccak_block_sizes[136] 517 1 T30 3 T32 3 T195 3
len_keccak_block_sizes[144] 416 1 T30 3 T32 3 T195 3
len_keccak_block_sizes[168] 317 1 T30 3 T32 3 T195 3
len_1 766 1 T30 3 T32 3 T195 3
len_0 1238 1 T1 11 T2 2 T30 3

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