Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10211	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8905	1			T3	17		T18	38		T39	24
len_5001_7500	14151	1			T2	33		T3	17		T18	36
len_2501_5000	9160	1			T2	34		T3	17		T18	36
len_1025_2500	5415	1			T2	20		T3	10		T18	22
len_769_1024	6499	1			T2	4		T3	2		T18	4
len_513_768	6905	1			T2	3		T3	2		T18	4
len_257_512	21036	1			T2	4		T3	2		T18	52
len_0_256	253942	1			T2	148		T3	290		T18	2017
len_keccak_block_sizes[72]	724	1			T2	2		T3	2		T18	3
len_keccak_block_sizes[104]	610	1			T3	2		T18	3		T39	2
len_keccak_block_sizes[136]	521	1			T3	2		T18	3		T69	3
len_keccak_block_sizes[144]	421	1			T3	2		T18	3		T8	1
len_keccak_block_sizes[168]	317	1			T18	3		T69	3		T51	3
len_1	749	1			T2	2		T3	2		T18	3
len_0	1150	1			T2	2		T3	2		T18	3