Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	712	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5520	1			T23	6		T37	28		T8	3
len_601_800	12768	1			T23	22		T37	74		T8	4
len_401_600	8475	1			T23	18		T37	42		T8	7
len_201_400	16346	1			T18	251		T36	1		T23	8
len_65_200	72465	1			T18	680		T23	4		T37	19
len_min_for_xof_require_squeeze	987	1			T18	10		T69	10		T51	9
len_keccak_block_sizes[72]	748	1			T18	5		T37	1		T69	5
len_keccak_block_sizes[104]	735	1			T18	5		T23	1		T69	5
len_keccak_block_sizes[136]	735	1			T18	5		T69	5		T51	9
len_keccak_block_sizes[144]	283	1			T18	5		T69	5		T181	5
len_keccak_block_sizes[168]	285	1			T18	5		T69	5		T181	5
len_datapath_width	14096	1			T2	246		T18	5		T38	246
len_2_63	211505	1			T3	390		T18	1329		T39	310
len_1	64	1			T68	4		T21	1		T182	1