Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10350	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8981	1			T1	30		T33	24		T35	10
len_5001_7500	14354	1			T1	30		T3	33		T33	24
len_2501_5000	9229	1			T1	30		T3	34		T33	24
len_1025_2500	5406	1			T1	16		T3	20		T33	14
len_769_1024	5900	1			T1	4		T2	22		T3	4
len_513_768	6211	1			T1	2		T2	22		T3	3
len_257_512	20792	1			T1	244		T2	33		T3	4
len_0_256	258191	1			T1	1897		T2	20		T3	148
len_keccak_block_sizes[72]	726	1			T1	3		T2	1		T3	2
len_keccak_block_sizes[104]	617	1			T1	3		T33	2		T37	2
len_keccak_block_sizes[136]	524	1			T1	3		T37	2		T57	3
len_keccak_block_sizes[144]	417	1			T1	3		T37	2		T57	3
len_keccak_block_sizes[168]	323	1			T1	3		T57	3		T81	3
len_1	750	1			T1	3		T3	2		T33	2
len_0	1217	1			T1	3		T3	2		T33	2