Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10288	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8818	1			T2	13		T18	42		T31	38
len_5001_7500	13849	1			T2	30		T18	103		T31	36
len_2501_5000	9085	1			T2	13		T7	1		T18	15
len_1025_2500	5254	1			T2	4		T18	7		T31	22
len_769_1024	6153	1			T2	6		T3	32		T7	10
len_513_768	6523	1			T2	13		T3	39		T7	5
len_257_512	20938	1			T2	15		T3	23		T7	9
len_0_256	255848	1			T2	80		T3	31		T7	24
len_keccak_block_sizes[72]	704	1			T31	3		T33	2		T73	3
len_keccak_block_sizes[104]	613	1			T18	1		T31	3		T32	1
len_keccak_block_sizes[136]	519	1			T31	3		T73	3		T100	2
len_keccak_block_sizes[144]	420	1			T31	3		T73	3		T100	2
len_keccak_block_sizes[168]	310	1			T2	1		T3	1		T31	3
len_1	745	1			T18	1		T30	1		T31	3
len_0	1193	1			T2	6		T18	6		T30	4