Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	671	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5426	1			T2	21		T3	14		T7	3
len_601_800	11983	1			T2	38		T3	58		T7	16
len_401_600	8053	1			T2	27		T3	23		T7	12
len_201_400	16136	1			T2	19		T3	13		T7	6
len_65_200	73501	1			T2	37		T3	9		T7	1
len_min_for_xof_require_squeeze	990	1			T31	10		T73	9		T101	9
len_keccak_block_sizes[72]	763	1			T18	1		T30	2		T31	5
len_keccak_block_sizes[104]	758	1			T30	1		T31	5		T73	9
len_keccak_block_sizes[136]	762	1			T18	3		T30	2		T31	5
len_keccak_block_sizes[144]	268	1			T31	5		T102	5		T55	1
len_keccak_block_sizes[168]	282	1			T30	1		T31	5		T102	5
len_datapath_width	13616	1			T2	4		T3	2		T7	3
len_2_63	212718	1			T2	46		T3	47		T7	23
len_1	48	1			T2	1		T7	1		T169	1