Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10208	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9013	1			T1	36		T2	17		T16	30
len_5001_7500	14568	1			T1	83		T2	17		T16	30
len_2501_5000	9214	1			T1	17		T2	17		T16	30
len_1025_2500	5369	1			T1	16		T2	10		T16	16
len_769_1024	6228	1			T1	1		T2	2		T16	4
len_513_768	6835	1			T1	1		T2	2		T16	2
len_257_512	21231	1			T1	3		T2	2		T16	244
len_0_256	255517	1			T1	16		T2	290		T16	1897
len_keccak_block_sizes[72]	709	1			T2	2		T16	3		T35	2
len_keccak_block_sizes[104]	620	1			T2	2		T16	3		T35	2
len_keccak_block_sizes[136]	513	1			T2	2		T16	3		T35	2
len_keccak_block_sizes[144]	419	1			T2	2		T16	3		T35	2
len_keccak_block_sizes[168]	323	1			T16	3		T8	1		T62	3
len_1	733	1			T2	2		T16	3		T35	2
len_0	1247	1			T1	4		T2	2		T16	3