Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10172	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9098	1			T1	17		T33	24		T37	19
len_5001_7500	14487	1			T1	17		T33	24		T37	18
len_2501_5000	9186	1			T1	17		T33	24		T37	18
len_1025_2500	5318	1			T1	10		T33	14		T37	11
len_769_1024	6340	1			T1	2		T3	25		T16	43
len_513_768	6762	1			T1	2		T3	18		T16	42
len_257_512	21108	1			T1	2		T3	26		T16	28
len_0_256	254404	1			T1	290		T3	24		T16	42
len_keccak_block_sizes[72]	718	1			T1	2		T33	2		T37	2
len_keccak_block_sizes[104]	612	1			T1	2		T33	2		T37	2
len_keccak_block_sizes[136]	513	1			T1	2		T37	2		T38	3
len_keccak_block_sizes[144]	407	1			T1	2		T38	3		T203	2
len_keccak_block_sizes[168]	313	1			T38	3		T22	1		T204	3
len_1	746	1			T1	2		T33	2		T37	2
len_0	1259	1			T1	2		T33	2		T6	1