Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10176	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8841	1			T32	17		T35	38		T36	27
len_5001_7500	14086	1			T31	33		T32	17		T35	36
len_2501_5000	9077	1			T31	34		T32	17		T35	36
len_1025_2500	5344	1			T31	20		T32	10		T35	22
len_769_1024	6477	1			T1	28		T2	27		T3	2
len_513_768	6688	1			T1	41		T2	20		T3	3
len_257_512	21009	1			T1	25		T2	25		T3	2
len_0_256	253928	1			T1	40		T2	24		T3	2
len_keccak_block_sizes[72]	717	1			T31	2		T32	2		T35	3
len_keccak_block_sizes[104]	615	1			T32	2		T35	3		T38	3
len_keccak_block_sizes[136]	523	1			T32	2		T35	3		T19	1
len_keccak_block_sizes[144]	419	1			T32	2		T35	3		T38	3
len_keccak_block_sizes[168]	313	1			T35	3		T38	3		T59	3
len_1	743	1			T31	2		T32	2		T35	3
len_0	1191	1			T31	2		T32	2		T35	3