Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	679	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5545	1			T1	22		T2	13		T16	3
len_601_800	12683	1			T1	39		T2	35		T3	5
len_401_600	8320	1			T1	26		T2	26		T3	3
len_201_400	16218	1			T1	15		T2	10		T3	1
len_65_200	72534	1			T1	5		T2	5		T35	680
len_min_for_xof_require_squeeze	990	1			T35	10		T38	10		T59	10
len_keccak_block_sizes[72]	751	1			T35	5		T38	5		T59	5
len_keccak_block_sizes[104]	752	1			T1	1		T35	5		T16	1
len_keccak_block_sizes[136]	735	1			T35	5		T38	5		T59	5
len_keccak_block_sizes[144]	289	1			T35	5		T19	1		T38	5
len_keccak_block_sizes[168]	280	1			T35	5		T16	1		T38	5
len_datapath_width	14138	1			T1	1		T2	1		T31	246
len_2_63	210858	1			T1	6		T2	30		T3	7
len_1	53	1			T61	3		T141	2		T182	1