Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10201	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9081	1			T3	38		T32	19		T34	30
len_5001_7500	14768	1			T3	36		T32	18		T34	30
len_2501_5000	9175	1			T3	36		T32	18		T34	30
len_1025_2500	5410	1			T3	22		T32	11		T34	16
len_769_1024	6212	1			T1	1		T3	4		T7	30
len_513_768	6529	1			T1	4		T3	4		T7	33
len_257_512	20830	1			T1	2		T3	52		T7	27
len_0_256	255597	1			T1	4		T2	139		T3	2017
len_keccak_block_sizes[72]	718	1			T3	3		T32	2		T34	3
len_keccak_block_sizes[104]	612	1			T3	3		T32	2		T34	3
len_keccak_block_sizes[136]	515	1			T3	3		T32	2		T34	3
len_keccak_block_sizes[144]	418	1			T3	3		T7	1		T34	3
len_keccak_block_sizes[168]	322	1			T3	3		T34	3		T75	3
len_1	739	1			T2	1		T3	3		T32	2
len_0	1221	1			T2	5		T3	3		T32	2