Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::output_digest_len_cg

Group : kmac_env_pkg::kmac_env_cov::output_digest_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	14	0	14	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::output_digest_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
output_digest_len	14	0	14	100.00	100	1	1	0

Summary for Variable output_digest_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	14	0	14	100.00

User Defined Bins for output_digest_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	690	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_801_1000	5582	1			T1	1		T7	24		T36	37
len_601_800	12686	1			T1	5		T7	48		T36	53
len_401_600	8392	1			T1	4		T7	33		T36	41
len_201_400	16611	1			T1	1		T3	251		T7	18
len_65_200	73299	1			T2	64		T3	680		T7	5
len_min_for_xof_require_squeeze	989	1			T2	1		T3	10		T34	9
len_keccak_block_sizes[72]	748	1			T2	1		T3	5		T34	9
len_keccak_block_sizes[104]	752	1			T3	5		T34	9		T75	5
len_keccak_block_sizes[136]	740	1			T2	2		T3	5		T34	9
len_keccak_block_sizes[144]	284	1			T3	5		T36	1		T75	5
len_keccak_block_sizes[168]	287	1			T3	5		T75	5		T48	5
len_datapath_width	14077	1			T2	3		T3	5		T33	3
len_2_63	211999	1			T1	3		T2	71		T3	1329
len_1	53	1			T2	1		T154	2		T69	1