Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

---

Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10314	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9141	1			T1	5		T15	10		T67	17
len_5001_7500	14655	1			T1	17		T36	33		T123	33
len_2501_5000	9313	1			T1	7		T36	34		T123	34
len_1025_2500	5406	1			T1	1		T36	20		T123	20
len_769_1024	6499	1			T1	37		T3	18		T35	23
len_513_768	6834	1			T1	43		T3	31		T35	24
len_257_512	21502	1			T1	48		T3	29		T35	24
len_0_256	258096	1			T1	156		T3	22		T32	9
len_keccak_block_sizes[72]	724	1			T1	1		T36	2		T123	2
len_keccak_block_sizes[104]	611	1			T67	2		T58	3		T39	3
len_keccak_block_sizes[136]	527	1			T67	2		T58	3		T39	3
len_keccak_block_sizes[144]	426	1			T35	1		T67	2		T58	3
len_keccak_block_sizes[168]	324	1			T1	1		T58	3		T19	1
len_1	744	1			T36	2		T123	2		T67	2
len_0	1209	1			T1	1		T36	2		T123	2