Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10239	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8938	1			T3	24		T34	24		T35	19
len_5001_7500	14516	1			T3	24		T34	24		T35	18
len_2501_5000	9190	1			T3	24		T34	24		T35	18
len_1025_2500	5423	1			T3	14		T34	14		T35	11
len_769_1024	6043	1			T3	2		T34	2		T7	4
len_513_768	6270	1			T3	3		T34	3		T7	15
len_257_512	20647	1			T3	2		T34	2		T7	9
len_0_256	255992	1			T1	167		T3	211		T16	9
len_keccak_block_sizes[72]	718	1			T3	2		T34	2		T7	1
len_keccak_block_sizes[104]	608	1			T3	2		T34	2		T35	2
len_keccak_block_sizes[136]	519	1			T35	2		T36	2		T37	3
len_keccak_block_sizes[144]	415	1			T36	2		T37	3		T87	2
len_keccak_block_sizes[168]	317	1			T37	3		T90	3		T91	3
len_1	757	1			T1	2		T3	2		T34	2
len_0	1214	1			T1	7		T3	2		T34	2