Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10322	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	9054	1			T3	35		T33	24		T34	23
len_5001_7500	14503	1			T3	86		T33	24		T34	42
len_2501_5000	9226	1			T3	11		T33	24		T34	11
len_1025_2500	5376	1			T3	7		T33	14		T34	5
len_769_1024	6215	1			T3	1		T33	2		T22	19
len_513_768	6652	1			T3	2		T33	3		T22	33
len_257_512	21158	1			T3	2		T33	2		T34	2
len_0_256	258401	1			T1	9		T2	9		T3	16
len_keccak_block_sizes[72]	720	1			T33	2		T35	2		T38	2
len_keccak_block_sizes[104]	629	1			T33	2		T35	2		T38	2
len_keccak_block_sizes[136]	536	1			T38	2		T16	1		T43	3
len_keccak_block_sizes[144]	428	1			T16	1		T43	3		T86	3
len_keccak_block_sizes[168]	317	1			T43	3		T86	3		T116	3
len_1	746	1			T33	2		T35	2		T38	2
len_0	1187	1			T3	4		T33	2		T34	5