Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10344	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8823	1			T1	24		T2	19		T32	24
len_5001_7500	14229	1			T1	24		T2	18		T30	33
len_2501_5000	9156	1			T1	24		T2	18		T30	34
len_1025_2500	5345	1			T1	14		T2	11		T30	20
len_769_1024	6061	1			T1	2		T2	2		T3	39
len_513_768	6385	1			T1	3		T2	2		T3	40
len_257_512	21050	1			T1	2		T2	2		T3	60
len_0_256	257220	1			T1	211		T2	274		T3	48
len_keccak_block_sizes[72]	717	1			T1	2		T2	2		T30	2
len_keccak_block_sizes[104]	617	1			T1	2		T2	2		T3	1
len_keccak_block_sizes[136]	518	1			T2	2		T64	3		T200	3
len_keccak_block_sizes[144]	426	1			T64	3		T17	1		T200	3
len_keccak_block_sizes[168]	321	1			T62	1		T64	3		T200	3
len_1	749	1			T1	2		T2	2		T30	2
len_0	1212	1			T1	2		T2	2		T29	3