Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10189	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8988	1			T2	7		T3	24		T30	19
len_5001_7500	14764	1			T2	16		T3	24		T30	18
len_2501_5000	9291	1			T2	4		T3	24		T30	18
len_1025_2500	5452	1			T2	1		T3	14		T30	11
len_769_1024	6549	1			T2	35		T3	2		T30	2
len_513_768	7042	1			T2	40		T3	3		T30	2
len_257_512	21266	1			T2	44		T3	2		T30	2
len_0_256	256461	1			T1	42		T2	101		T3	211
len_keccak_block_sizes[72]	710	1			T3	2		T30	2		T31	2
len_keccak_block_sizes[104]	607	1			T3	2		T30	2		T31	2
len_keccak_block_sizes[136]	518	1			T30	2		T36	3		T76	1
len_keccak_block_sizes[144]	419	1			T36	3		T77	3		T177	3
len_keccak_block_sizes[168]	322	1			T2	2		T36	3		T20	1
len_1	739	1			T3	2		T30	2		T31	2
len_0	1233	1			T1	1		T2	1		T3	2