Group : tb.dut.kmac_cov_if::cmd_process_cg
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Group : tb.dut.kmac_cov_if::cmd_process_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_cov_0/kmac_cov_if.sv



Summary for Group tb.dut.kmac_cov_if::cmd_process_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 7 0 7 100.00


Variables for Group tb.dut.kmac_cov_if::cmd_process_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
kmac_keccak_state 2 0 2 100.00 100 1 1 0
kmac_msgfifo_empty 2 0 2 100.00 100 1 1 0
kmac_msgfifo_full 2 0 2 100.00 100 1 1 0
kmac_msgfifo_has_data 1 0 1 100.00 100 1 1 0


Summary for Variable kmac_keccak_state

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for kmac_keccak_state

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
inactive 643954 1 T1 1 T2 49 T3 22
active 52646 1 T2 2 T21 36 T36 12



Summary for Variable kmac_msgfifo_empty

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for kmac_msgfifo_empty

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
not_empty 39544 1 T2 10 T21 4 T36 1
empty 657056 1 T1 1 T2 41 T3 22



Summary for Variable kmac_msgfifo_full

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 2 0 2 100.00


User Defined Bins for kmac_msgfifo_full

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
not_full 696407 1 T1 1 T2 51 T3 22
full 193 1 T14 3 T20 2 T17 3



Summary for Variable kmac_msgfifo_has_data

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for kmac_msgfifo_has_data

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
has_data 34852 1 T2 1 T21 4 T37 9

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%