Unified Coverage Report :: Group :: kmac_env_pkg::kmac_env_cov::msg_len_cg

Group : kmac_env_pkg::kmac_env_cov::msg_len_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_kmac_env_0.1/kmac_env_cov.sv

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Summary for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	15	0	15	100.00

Variables for Group kmac_env_pkg::kmac_env_cov::msg_len_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
msg_len	15	0	15	100.00	100	1	1	0

Summary for Variable msg_len

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	15	0	15	100.00

User Defined Bins for msg_len

Excluded/Illegal bins

NAME	COUNT	STATUS
remainder	10324	Excluded

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
len_7501_10000	8937	1			T36	24		T37	38		T35	11
len_5001_7500	14337	1			T21	33		T36	24		T37	36
len_2501_5000	9305	1			T21	34		T36	24		T37	36
len_1025_2500	5393	1			T21	20		T36	14		T37	22
len_769_1024	6215	1			T2	4		T3	2		T21	4
len_513_768	6633	1			T2	6		T3	2		T21	3
len_257_512	21102	1			T2	5		T3	3		T21	4
len_0_256	258446	1			T2	1		T3	4		T21	148
len_keccak_block_sizes[72]	716	1			T21	2		T36	2		T37	3
len_keccak_block_sizes[104]	623	1			T36	2		T37	3		T38	2
len_keccak_block_sizes[136]	523	1			T37	3		T38	2		T39	2
len_keccak_block_sizes[144]	428	1			T37	3		T38	2		T88	3
len_keccak_block_sizes[168]	321	1			T37	3		T14	1		T88	3
len_1	761	1			T21	2		T36	2		T37	3
len_0	1219	1			T21	2		T36	2		T37	3